{
  "source": "Cooked Index — occupational AI risk register",
  "page": "https://cookedindex.com/jobs/semiconductor-processing-technicians/",
  "methodology": "https://cookedindex.com/methodology",
  "notice": "Verdicts are re-examined as evidence accumulates. Re-fetch before relying on this; the page above always carries the current score.",
  "scored_at": "2026-08-11",
  "model": "claude-opus-5",
  "occupation": {
    "title": "Semiconductor Processing Technicians",
    "soc_code": "51-9141",
    "category": "Production",
    "us_employment": 31460,
    "median_annual_wage": 51430
  },
  "verdict": "EXPOSED",
  "risk_resistance": 35,
  "contested": false,
  "near_boundary": false,
  "dimensions": {
    "task_resistance": 9,
    "embodiment": 14,
    "liability_shield": 1,
    "trust_premium": 3,
    "judgment_accountability": 8
  },
  "reasoning": {
    "task_resistance": "At 9 the split is real: recipe execution, SPC charting, alarm logging and wafer transport are already handled by the tool's host software and OHT rails, but preventive maintenance on a chamber — breaking vacuum, replacing a focus ring or showerhead, wet-cleaning a quartz tube, requalifying with monitor wafers — still needs a gowned human in the bay, which is why this sits mid-band rather than at 4.",
    "embodiment": "The work is bodily — bunny suit, gloves, hours standing at the tool, reaching into an etcher during a down event, handling HF and solvent lines — but it happens inside a Class 1 cleanroom with interlocks, SOPs and a shift lead, not on a roof or a roadside.",
    "liability_shield": "No state licence gates this bench: employers hire on a high-school diploma plus an associate degree or fab-specific training, and any credential (SEMI courses, an MSSC or community-college certificate) is a hiring preference — the process engineer's name, not yours, is on the released process spec.",
    "trust_premium": "Your output is a wafer lot indistinguishable from every other lot that ran that recipe; the customer never learns which shift ran it, and the only relationship that carries weight is your reputation with the process engineer who decides whether to believe your particle call.",
    "judgment_accountability": "An 8 reflects the daily latitude that OCAPs and SPC rules do not cover — deciding a chamber is drifting before it trips a limit, putting a lot on hold, calling out an equipment engineer at 3 a.m., choosing to rework or scrap — but the escalation path is short and engineering owns the disposition, so the ambiguous million-dollar calls end up above you."
  },
  "rationale": "The modal technician gowns up, loads and unloads wafer carriers, runs recipes on deposition/etch/litho tools, monitors SPC charts, and clears alarms — most of the monitoring, logging, and chart-reading layer is already software's job, and modern fabs move wafers by overhead robotics without human hands. What persists is physical: crawling into a tool during a down event, swapping chamber parts, chasing particle sources, and making the judgment call to hold a lot. The threat here is industrial automation and fab-design consolidation more than language models, and it has been eroding this role for two decades even as CHIPS-funded fabs add headcount.",
  "outlook": "Fab expansion keeps hiring strong through the decade, but the jobs on offer shift decisively from wafer-handling operators to equipment maintenance and tool-install technicians.",
  "what_would_raise_it": {
    "levers": [
      {
        "dimension": "task_resistance",
        "change": "Task-mix shift is genuine here: as MES/APC software absorbs the SPC-watching, logging and recipe-launch tier, what remains is unscheduled down-event diagnosis — chamber teardown, particle source chasing, tool requalification after PM. If fab staffing plans formalize the split into 'operator' (automated away) vs 'equipment/process technician' (diagnostic), the surviving role's non-automatable share rises. Watch job postings at TSMC Arizona, Intel Ohio, Samsung Taylor shifting from 'manufacturing technician' to 'equipment maintenance technician' titles.",
        "plausibility": "already happening",
        "would_add": 4
      },
      {
        "dimension": "embodiment",
        "change": "Advanced-node tools (High-NA EUV, high-aspect-ratio etch, hybrid bonding) add more serviceable subsystems in tighter cleanroom spaces, and OEM service contracts (ASML, Applied, Lam) require physical human intervention for chamber-open work and source module swaps. If leading-edge and advanced-packaging capacity grows as a share of US fab work, the physical-unpredictable fraction of the day rises.",
        "plausibility": "plausible",
        "would_add": 3
      },
      {
        "dimension": "judgment_accountability",
        "change": "Formal hold authority: if fabs codify that a named technician (not the APC system) owns the decision to scrap or hold a lot after an excursion, with signature in the MES excursion record — driven by customer quality requirements such as IATF 16949 / AEC-Q100 traceability for automotive silicon, or ITAR/DMEA trusted-foundry audit trails on defense wafers — the role owns consequential ambiguous calls on the record.",
        "plausibility": "plausible",
        "would_add": 4
      },
      {
        "dimension": "liability_shield",
        "change": "Weak but non-zero route: DMEA Trusted Foundry accreditation and defense-microelectronics supply-chain rules require named, cleared personnel to attest to process integrity on specific lots. If such attestation is pushed down to the technician signature level rather than the fab quality manager, a small shield appears. There is no state licensing board for this trade and none is being proposed.",
        "plausibility": "unlikely",
        "would_add": 2
      }
    ],
    "ceiling_note": "Trust premium has no realistic route — wafer buyers purchase yield and parametric data, never the identity of the human who ran the tool, and nothing in the semiconductor supply chain prices human touch. The dominant threat is fab design and OEM automation, which no institutional lever offsets: a headcount-per-wafer-start reduction erases the occupation regardless of how much judgment the survivors own."
  },
  "adjudication": null,
  "employment_history": {
    "points": [
      {
        "y": 2019,
        "emp": 27680,
        "wage": 38060
      },
      {
        "y": 2020,
        "emp": 31080,
        "wage": 40500
      },
      {
        "y": 2021,
        "emp": 24020,
        "wage": 39870
      },
      {
        "y": 2022,
        "emp": 23860,
        "wage": 44690
      },
      {
        "y": 2023,
        "emp": 26450,
        "wage": 45850
      },
      {
        "y": 2024,
        "emp": 32150,
        "wage": 51180
      },
      {
        "y": 2025,
        "emp": 31460,
        "wage": 51430
      }
    ],
    "from": 2019,
    "to": 2025,
    "change_pct": 13.7,
    "comparable_from": 2019,
    "spans_soc_revision": false
  },
  "pivots": [],
  "license": "https://cookedindex.com/terms"
}